-- SN74138 22.05.2015 -- Gustl Buheitel ------------------------------------------------------------------------------------------------------------------------------------ library ieee; use ieee.std_logic_1164.all; use IEEE.numeric_std.all; entity SN74138 is Port ( PIN_01_A : in STD_LOGIC; PIN_02_B : in STD_LOGIC; PIN_03_C : in STD_LOGIC; PIN_04_NOTG2A : in STD_LOGIC; PIN_05_NOTG2B : in STD_LOGIC; PIN_06_G1 : in STD_LOGIC; PIN_07_Y7 : out STD_LOGIC; PIN_09_Y6 : out STD_LOGIC; PIN_10_Y5 : out STD_LOGIC; PIN_11_Y4 : out STD_LOGIC; PIN_12_Y3 : out STD_LOGIC; PIN_13_Y2 : out STD_LOGIC; PIN_14_Y1 : out STD_LOGIC; PIN_15_Y0 : out STD_LOGIC); end SN74138; architecture Verhalten of SN74138 is signal NOTG2: std_logic:='0'; begin NOTG2 <= PIN_04_NOTG2A AND PIN_05_NOTG2B; PIN_15_Y0 <= '0' when PIN_06_G1 = '1' AND NOTG2 = '0' AND PIN_03_C = '0' AND PIN_02_B = '0' AND PIN_01_A = '0' else '1'; PIN_14_Y1 <= '0' when PIN_06_G1 = '1' AND NOTG2 = '0' AND PIN_03_C = '0' AND PIN_02_B = '0' AND PIN_01_A = '1' else '1'; PIN_13_Y2 <= '0' when PIN_06_G1 = '1' AND NOTG2 = '0' AND PIN_03_C = '0' AND PIN_02_B = '1' AND PIN_01_A = '0' else '1'; PIN_12_Y3 <= '0' when PIN_06_G1 = '1' AND NOTG2 = '0' AND PIN_03_C = '0' AND PIN_02_B = '1' AND PIN_01_A = '1' else '1'; PIN_11_Y4 <= '0' when PIN_06_G1 = '1' AND NOTG2 = '0' AND PIN_03_C = '1' AND PIN_02_B = '0' AND PIN_01_A = '0' else '1'; PIN_10_Y5 <= '0' when PIN_06_G1 = '1' AND NOTG2 = '0' AND PIN_03_C = '1' AND PIN_02_B = '0' AND PIN_01_A = '1' else '1'; PIN_09_Y6 <= '0' when PIN_06_G1 = '1' AND NOTG2 = '0' AND PIN_03_C = '1' AND PIN_02_B = '1' AND PIN_01_A = '0' else '1'; PIN_07_Y7 <= '0' when PIN_06_G1 = '1' AND NOTG2 = '0' AND PIN_03_C = '1' AND PIN_02_B = '1' AND PIN_01_A = '1' else '1'; end Verhalten;